- #HARDWARE TILED RESOURCES TIER 2 UPGRADE#
- #HARDWARE TILED RESOURCES TIER 2 FULL#
- #HARDWARE TILED RESOURCES TIER 2 WINDOWS 10#
- #HARDWARE TILED RESOURCES TIER 2 PLUS#
GPU Manufacturers have their own websites underlining the features of DirectX 12: The DirectX Feature Level 12_2 will be supported by NVIDIA Turing (RTX 20), Ampere (RTX 30), AMD RDNA2 (RX 6000), and INTEL Xe-HPG. NVIDIA Maxwell (GTX 900), Pascal (GTX 10), Turing (GTX 16), AMD RDNA (RX 5000), GCN 5 (Vega), and INTEL Gen 9, Gen 9.5 all support DirectX 12_1. This technology dynamically adjusts shading rates for different parts of the scene, reducing the GPU workload where it is not needed the most. Additionally VRS (variable-rate shading) tier 2 will be part of the 12_2 set. The feature-level enum 12_2 also introduces mesh shading, an intelligent GPU control of details and a tesselation for objects.
This technology will be hardware accelerated by all next-generation graphics architecture (including NVIDIA Ampere, AMD RDNA2, and Intel Xe-HPG).
#HARDWARE TILED RESOURCES TIER 2 UPGRADE#
The most important feature upgrade is certainly the Raytracing tier 1.1. The new feature-level directly corresponds to the DirectX 12 Ultimate announcement back from March ( source).
#HARDWARE TILED RESOURCES TIER 2 WINDOWS 10#
There are currently three levels for the latest DirectX 12 API, which was first introduced with Windows 10 operating system. The upgrade to a newer feature level is, as the company says, ‘huge’.ĭirectX feature levels determine the capabilities of graphics devices. Microsoft has provided a list of features to be supported by the latest iteration of DirectX 12 graphics API.
Limitations on how tiles can be accessed when there are duplicate mappings, described in Tile access limitations with duplicate mappings, continue to apply.Microsoft details DirectX Feature Level 12_2. Tiled resources with any mipmaps less than standard tile size in any dimension are not allowed to have an array size larger than 1. For info about Min/Max reduction filtering, see Tiled resources texture sampling features. Min/Max reduction filtering is supported. The mip packing is a unique set of packed tiles per array slice. The application can map the N tiles into arbitrarily disjoint locations in a tile pool, but must either map all or none of the packed tiles. Alignment constraints for standard tile shapes: Mipmaps that fill at least one standard tile in all dimensions are guaranteed to use the standard tiling, with the remainder considered packed as a unit into N tiles (N reported to the application). This is regardless of how the texture access result might get write masked in the shader and how many components are in the texture format (the combination of which might make it appear that the texture does not need to be accessed). NULL texel accesses cause the CheckAccessFullyMapped operation on the status feedback for a texture read to return false. No other hardware will be allowed to miss the requirement to include all (nonzero weighted) texels in the filter operation. 
#HARDWARE TILED RESOURCES TIER 2 FULL#
Some early hardware don't meet this requirement and returns 0 (with defaults for missing format components) for the full filter result if any texels (with nonzero weight) fall on a NULL tile.
Texture filtering with a footprint that straddles NULL and non- NULL tiles contributes 0 (with defaults for missing format components) for texels on NULL tiles into the overall filter operation. Writes to non-mapped tiles are stopped from going to memory but might end up in caches that subsequent reads to the same address might or might not pick up. Reads from non-mapped tiles return 0 in all non-missing components of the format, and the default for missing components. For more info, see HLSL tiled resources exposure. Shader instructions for clamping LOD and mapped status feedback are available. 
#HARDWARE TILED RESOURCES TIER 2 PLUS#
All features of the previous tier (without Tier 1 specific limitations) plus the additions in these following items:. Hardware at Feature Level 11.1 minimum.
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